发明名称 Semiconductor device with upper portion of plugs contacting source and drain regions being a first self-aligned silicide
摘要 A semiconductor device including: a cell transistor including: a pair of source and drain regions formed in a surface portion of a silicon substrate so as to have a predetermined space therebetween; a channel region sandwiched by the source and drain regions; a gate formed above the channel region with a gate dielectric film being formed therebetween; and a silicon plug formed on the silicon substrate, the silicon plug electrically contacting the source and drain regions, an upper portion of the silicon plug being a first self-aligned silicide portion.
申请公布号 US7061032(B2) 申请公布日期 2006.06.13
申请号 US20040787133 申请日期 2004.02.27
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KAJIYAMA TAKESHI
分类号 H01L21/28;H01L29/772;H01L21/768;H01L21/8234;H01L21/8242;H01L21/84;H01L23/522;H01L27/088;H01L27/10;H01L27/105;H01L27/108;H01L27/12;H01L29/417;H01L29/78;H01L29/786 主分类号 H01L21/28
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