| 摘要 |
A chip package structure is disclosed. The chip package structure essentially comprises a carrier, one or more chips, a heat sink and an encapsulating material layer. At least one of the chips is flip-chip bonded and electrically connected to the carrier or another chip. There is a flip-chip bonding gap between the chip and the carrier or other chips. A heat sink is positioned on the uppermost chip. The encapsulating material layer fills the flip-chip bonding gap as well as a gap between the uppermost chip and the heat sink. A part of the surface of the heat sink away from the upper-most chip is exposed. Furthermore, the encapsulating material layer is formed in a simultaneous molding process. For example, the chip is separated from the heat sink by a distance between 0.03~0.2 mm, and the encapsulating material has a thermal conductivity greater than 1.2 W/m.K. |
