发明名称 Arrangement of vias in a substrate to support a ball grid array
摘要 An arrangement of pads with selective via in pad for mounting a semiconductor package on a substrate. In order to strengthen the soldered bonds, standard pads, which have a stronger bond, are used in locations of greatest stress and deflection. Vias in pad (VIP) are used at all other locations to improve routing advantages due to their smaller surface area.
申请公布号 US7061116(B2) 申请公布日期 2006.06.13
申请号 US20010962254 申请日期 2001.09.26
申请人 INTEL CORPORATION 发明人 MCCORMICK CAROLYN;JESSEP REBECCA;DUNGAN JOHN;BOGGS DAVID W.;SATO DARYL
分类号 H01L23/48;H01L23/498;H01L23/52;H01L29/40;H05K1/11;H05K3/34 主分类号 H01L23/48
代理机构 代理人
主权项
地址