发明名称 Methodology for selectively testing portions of an integrated circuit
摘要 A method and apparatus are disclosed for easily reconfiguring a scan chain test of a subset of scan blocks within a digital integrated circuit chip. To mitigate timing violations in the scan test of scan chains, alternative embodiments to implement a transfer of scan data to a next scan block are implemented.
申请公布号 US7062693(B2) 申请公布日期 2006.06.13
申请号 US20030417904 申请日期 2003.04.17
申请人 BROADCOM CORPORATION 发明人 SWEET JAMES;GUETTAF AMAR
分类号 G01R31/28;G01R31/3185 主分类号 G01R31/28
代理机构 代理人
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