发明名称 |
Conditional vector arithmetic method and conditional vector arithmetic unit |
摘要 |
It is decided whether a first source data from the memory 101 is a data which is to be subjected to arithmetic or not by a state flag detection means 150 , the result of the decision is retained as a state flag, and it is decided by a condition decision means 109 whether or not the state flag satisfies a condition for performing the arithmetic. A control means 110 controls whether an ALU 100 should perform the arithmetic or not on the basis of the condition satisfaction/dissatisfaction information.
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申请公布号 |
US7062633(B1) |
申请公布日期 |
2006.06.13 |
申请号 |
US20010868048 |
申请日期 |
2001.07.16 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
HAMADA MANA;KUROMARU SHUNICHI;YONEZAWA TOMONORI;NAKAMURA TSUYOSHI |
分类号 |
G06F9/302;G06F9/38;G06F17/16 |
主分类号 |
G06F9/302 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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