| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide an apparatus that determines the cause of a memory error in a computer system. <P>SOLUTION: First, the system detects a correctable error during an access to a memory location in a main memory by a first processor (402). The correctable error is detected by error detection and correction circuitry. Next, the system reads tag bits for a cache line associated with the memory location (408). The tag bits contain address information for the cache line, as well as state information indicating a coherency protocol state for the cache line. The system then test the memory location by causing the first processor to perform read and write operations to the memory location to produce test results. Finally, the system uses the test results and the tag bits to determine the cause of the correctable error (418, 430, 432) if possible. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
