发明名称 MULTI-CORE PROCESSOR AND DEBUGGING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide a multi-core processor and a debugging method which can debag a target terminal without needing any expensive external ICE. <P>SOLUTION: In this multi-core processor for a build-in system in which a debug control unit is incorporated, JTAG ICE debug functions, that is, program stop/resumption, register dump, memory dump and trace or the like are realized by using one multi-core processor. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006146412(A) 申请公布日期 2006.06.08
申请号 JP20040333075 申请日期 2004.11.17
申请人 NEC CORP 发明人 MURAMATSU EIJI
分类号 G06F11/22;G06F11/28;G06F15/78 主分类号 G06F11/22
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