发明名称 |
Integrated circuit capable of locating failure process layers |
摘要 |
An integrated circuit for locating failure process layers. The circuit has a substrate with a scan chain disposed therein, having scan cells connected to form a series chain. Each connection is formed according to a layout constraint of a minimum dimension provided by design rules for an assigned routing layer. Since the connection in the assigned routing layer is constrained to a minimum, the scan chain is vulnerable to variations in processes relevant to the assigned routing layer. The scan chain makes it easier to locate processes causing low yield rate of the scan chain.
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申请公布号 |
US2006123375(A1) |
申请公布日期 |
2006.06.08 |
申请号 |
US20060341481 |
申请日期 |
2006.01.30 |
申请人 |
CHENG AN-RU A;LIN CHANG-SONG;LIU TZU-CHUN;TSENG HUAN-YUNG |
发明人 |
CHENG AN-RU A.;LIN CHANG-SONG;LIU TZU-CHUN;TSENG HUAN-YUNG |
分类号 |
G06F17/50;G01R31/28;G01R31/3185 |
主分类号 |
G06F17/50 |
代理机构 |
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