| 摘要 |
<P>PROBLEM TO BE SOLVED: To attain data input/output for performing a high speed operation in a simple configuration. <P>SOLUTION: A first data input/output device 10 is configured as an IC chip equipped with a transmission clock terminal 103 for transmitting a clock to a second data input/output device 20, a transmission data output part having an output timing control circuit 104 for outputting transmission data synchronously with the timing of the clock, a transmission data terminal 107 for transmitting the transmission data to the second data input/output device 20, a reception clock terminal 110 for receiving an external clock different from the clock, a reception data inputting part having an input timing control circuit 115 for inputting the reception data synchronizing with the external clock from the second data input/output device 20 and a reception data terminal 116 for receiving the reception data. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
