发明名称 Method for fabricating semiconductor package having conductive bumps on chip
摘要 A semiconductor package having conductive bumps on a chip and a fabrication method thereof are provided. A plurality of the conductive bumps are deposited respectively on bond pads of the chip. An encapsulation body encapsulates the chip and conductive bumps while exposing ends of the conductive bumps. A plurality of conductive traces are formed on the encapsulation body and electrically connected to the exposed ends of the conductive bumps. A solder mask layer is applied over the conductive traces and formed with openings for exposing predetermined portions of the conductive traces. The exposed portions of the conductive traces are connected to a plurality of solder balls respectively. The conductive bumps on the bond pads of the chip allow easy positional recognition of the bond pads, making the conductive traces well electrically connected to the bond pads through the conductive bumps and assuring the quality and reliability of the semiconductor package.
申请公布号 US2006118944(A1) 申请公布日期 2006.06.08
申请号 US20060338056 申请日期 2006.01.23
申请人 SILICONWARE PRECISION INDUSTRIES CO., LTD. 发明人 HUANG CHIEN-PING;HSIAO CHENG-HSU
分类号 H01L23/053;H01L21/56;H01L21/60;H01L21/68;H01L23/31;H01L23/538 主分类号 H01L23/053
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