| 摘要 |
The aim of the invention is to provide a vertical nanotransistor which withstands stresses and is less complex than prior art nanotransistors. For this purpose, the invention provides a vertical nanotransistor which comprises a source contact, a drain contact, a gate region and a semiconducting cylindrical channel region between the source contact and the drain contact. The inventive transistor is characterized in that the cylindrical channel region is embedded in a flexible insulating substrate and is enclosed by the gate region, constituted by a metal layer on the flexible substrate and in the upper part of the channel region, in such a manner that the gate region and the upper section of the channel region form a coaxial structure and that the source contact, the semiconducting channel region and the drain contact are disposed vertically and the gate region is electrically insulated from the source contact, the drain contact and the semiconducting channel region and the upper surface and lower surface of the substrate are provided with an electrical insulation. The invention also relates to a memory assembly which consists of a plurality of vertical nanotransistors of the above-mentioned type, and to a method for producing the same.
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