发明名称 Driver circuit and method with reduced dI/dt and having delay compensation
摘要 A method of driving a power transistor switch comprising: receiving a drive input signal; converting the drive input signal into a converted drive input signal; and providing the converted gate drive input signal to a control electrode of the switch to turn on the switch, the converted drive input signal having three regions with respect to time, each having a slope, a first region in time having a first slope up to a Miller Plateau of the switch; a second region in time having a second slope with a reduced slope compared with the first slope; and a third region having a third slope that is greater than the second slope, whereby the control electrode voltage rapidly reaches the Miller Plateau voltage, then more slowly reaches a threshold voltage of the switch and then, when the switch has substantially fully turned on, the control electrode voltage is rapidly increased. The switch delay time is also maintained substantially constant by adjusting the transistor control electrode precharge voltage.
申请公布号 US2006120004(A1) 申请公布日期 2006.06.08
申请号 US20050264970 申请日期 2005.11.02
申请人 INTERNATIONAL RECTIFIER CORPORATION 发明人 THIERY VINCENT;NADD BRUNO;MOURRIER ANDRE
分类号 H02H9/06 主分类号 H02H9/06
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