发明名称 Acyclic modeling of combinational loops
摘要 Aspects of the present invention are directed to converting non-oscillatory combinational loops into acyclic circuits. Combinational loops may be modeled as state-holding elements where non-oscillatory loops are broken using edge-sensitive latches. In addition to providing a way to model combinational loops originally consisting only of gates (i.e., without originally including any state-holding elements), loops that have paths through user latches may also be converted. The presented methodology may be used with both small and large loops.
申请公布号 US2006123300(A1) 申请公布日期 2006.06.08
申请号 US20050068036 申请日期 2005.03.01
申请人 MENTOR GRAPHICS CORPORATION 发明人 GUPTA AMIT;SELVIDGE CHARLES W.
分类号 G01R31/28;G06F11/00 主分类号 G01R31/28
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