| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit with a built-in clock generation circuit and an electronic component for clock generation (SSCG module) in which noise generation is reduced and malfunctions of peripheral circuits and the electronic component or the like can be decreased. <P>SOLUTION: In the semiconductor integrated circuit with the built-in clock generation circuit comprising a PLL circuit which includes a frequency variable oscillator (116) and controls an oscillation frequency of the oscillator by comparing a phase of a reference signal with that of a feedback signal resulting from dividing a frequency of an output oscillation signal of the oscillator, and including a function of modulating the frequency of the output oscillation signal in predetermined cycles, a remarkable change in a modulation waveform is determined by switching a frequency dividing ratio of a frequency divider circuit (117) on a feedback path, and a phase of a signal to be fed back is switched by generating or selecting a plurality of signals resulting from shifting the phase of the output oscillation signal of said oscillator, thereby performing precise control of the modulation waveform. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
