发明名称 SEMICONDUCTOR APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor apparatus which is reduced in device cell pitch with its withstand voltage characteristics kept high and has a low ON-state resistance. SOLUTION: A p<SP>++</SP>-type source region 40 much higher in impurity concentration than a p-type semiconductor substrate 10 is provided on the surface of the p-type semiconductor substrate 10 so as to bring, at least, a part of its side face into contact with an n<SP>-</SP>-type extended drain region 20. A gate electrode 70 is formed on the n<SP>-</SP>-type extended drain region 20 through the intermediary of a gate insulating film 65, and covers the end of the p<SP>++</SP>-type source region 40 and its vicinity. When the semiconductor apparatus is put in an ON-state wherein a prescribed voltage is applied to the gate electrode 70, a degenerate region appears on the surface of the n<SP>-</SP>-type extended drain region 20 under the gate electrode 70, and a tunnel current flows through a border between a drain electrode 50 and a source electrode 80. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006147805(A) 申请公布日期 2006.06.08
申请号 JP20040335132 申请日期 2004.11.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KANEKO SAICHIRO
分类号 H01L29/78 主分类号 H01L29/78
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