| 摘要 |
<p>Methods and systems for protecting integrated circuits ("ICs") from power-on sequencing problems provide interim voltages during power-on sequences in order to prevent over-voltage conditions across IC terminals. The invention generates interim voltages when a voltage difference between terminals exceeds one or more thresholds. For example, in an embodiment, the present invention monitors voltages at first and second terminals of a circuit and provides an interim voltage to the second terminal when the voltage at the first terminal pad exceeds a first threshold and a voltage at the second terminal is below a second threshold. In other words, when a first power supply is powered on before a second power supply is powered on. The interim voltage protects the circuit from excessive voltage differences across the first and second terminals during power-on sequences, e.g., until the second power supply is powered on. The interim voltage is deactivated during normal operation so as not to draw excessive current. The invention helps to insure that multi-supply dependent logic and/or other circuitry does not receive inappropriate voltage levels, and thus helps to insure that lower voltage level based circuitry is not damaged during power-up, transients, and/or glitches. The present invention is compatible with digital CMOS process technologies and typically does not require additional masking steps. In an embodiment, no additional power supplies are required for implementing the invention. Circuitry for implementing the invention uses minimal area. In an embodiment, the invention provides an interim voltage during transients and/or glitches to prevent over-voltage conditions across IC terminals.</p> |
