| 摘要 |
A method of reducing electromagnetic interference in a clock generating circuit includes providing a first clock signal pair consisting of a first positive clock and a first negative clock, the first positive clock being substantially 180 degrees out of phase with the first negative clock. The method also includes providing a second clock signal pair consisting of a second positive clock and a second negative clock, the second positive clock being substantially 180 degrees out of phase with the second negative clock. The first positive clock is 180 degrees out of phase with the second positive clock and the first negative clock is 180 degrees out of phase with the second negative clock.
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