| 摘要 |
A circuit for controlling a refresh rate of memory cells of a dynamic memory includes a control circuit for controlling an access to memory cells of the dynamic memory. A memory circuit can be driven by the control circuit and stores a time information item with regard to an access to a memory cell assigned to the time information item. The control circuit can be operated in a supervisory operating mode such that a time information item is written to the memory circuit by the control circuit in the event of an access to the assigned memory cell. The time information item is read out in the event of a subsequent access to the assigned memory cell.
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