发明名称 Self-aligned trench-type DMOS transistor structure and its manufacturing methods
摘要 The self-aligned trench-type DMOS transistor structure comprises a self-aligned source region being surrounded by a trench gate region. The self-aligned source region comprises a moderately-doped p-base diffusion region formed in a lightly-doped epitaxial semiconductor substrate, a self-aligned heavily-doped n<SUP>+</SUP> source diffusion ring formed in a side surface portion of the moderately-doped p-base diffusion region, a heavily-doped p<SUP>+</SUP> contact diffusion region formed in a surface portion of the moderately-doped p-base diffusion region surrounded by the heavily-doped n<SUP>+</SUP> source diffusion ring, and a self-aligned source contact window formed by a semiconductor surface surrounded by a sidewall dielectric spacer. The trench gate region comprises a gate dielectric layer being lined over a trenched semiconductor surface with or without a thicker isolation dielectric layer formed on a bottom trenched semiconductor surface and a self-aligned highly conductive gate layer being formed at least over the gate dielectric layer.
申请公布号 US2006113588(A1) 申请公布日期 2006.06.01
申请号 US20040997949 申请日期 2004.11.29
申请人 SILLICON-BASED TECHNOLOGY CORP. 发明人 WU CHING-YUAN
分类号 H01L29/94 主分类号 H01L29/94
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