| 摘要 |
A circuit and a method for controlling output current of cascaded switching power converters having a buck type output stage are disclosed. The circuit comprises two comparators for sensing input and output current, a logic gate for processing the output states of the comparators, and a pulse width modulator circuit for receiving the output of the logic gate and for controlling a switching power converter in accordance with this output. The method comprises simultaneous monitoring current in the stages of the converter, comparing the currents to the corresponding reference levels, generating the corresponding error signals, and controlling a pulse-width modulator circuit of a switching converter in accordance with these error signals.
|
