发明名称 Selector circuit
摘要 <p>A plurality of conduction control circuits controls conduction of input signals. A logical operation circuit (22) receives output signals from each of the conduction control circuits via a plurality of signal paths (24a,24b), and performs a logical operation on each of the output signals to output a single signal (X). A signal-level setting circuit (23a,23b) sets, when the conduction of the input signals in the conduction control circuits connected to a same signal path is blocked, a signal level of the signal path. A control-signal generating circuit generates a first control signal (SELA to SELD, XSELA to XSELD) that controls the conduction control circuits to select only one input signal for conduction, and a second control signal (NSL1,NSL2) that controls the signal-level setting circuit (23a,23b) to set the signal level of the signal path, by performing a logical operation on a same input signal.</p>
申请公布号 EP1662659(A2) 申请公布日期 2006.05.31
申请号 EP20050251090 申请日期 2005.02.24
申请人 FUJITSU LIMITED 发明人 TANAKA, TOMOHIRO
分类号 H03K19/00 主分类号 H03K19/00
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