SELF ALIGNED COMPACT BIPOLAR JUNCTION TRANSISTOR LAYOUT, AND METHOD OF MAKING SAME

摘要

THE INVENTION RELATES TO A PROCESS OF FORMING A BIPOLAR JUNCTION TRANSISTOR (10) (BJT) THAT INCLUDES FORMING A TOPOLOGY OVER A SUBSTRATE (112). THEREAFTER ,A SPACER IS FORMED AT THE TOPOLOGY. A BASE LAYER IS FORMED FROM EPITAXIAL SILICON ABOVE THE SPACER AND AT THE TOPOLOGY. A LEAKAGE BLOCK STRUCTURE (158) IS FORMED IN THE SUBSTRATE (112) BY OUT- DIFFUSION FROM THE SPACER. THEREAFTER A BJT IS COMPLETED WITH THE BASE LAYER AND THE SPACER.