发明名称 |
System and method for blocking cache use during debugging |
摘要 |
A system includes at least one memory operable to store a first flag identifying whether a cache is disabled and a second flag identifying whether use of the cache is blocked. The system also includes combinatorial logic operable to use the first and second flags to determine whether the cache is used during execution of at least one instruction by a processor. The first flag identifies that the cache is enabled and the second flag identifies that the use of the cache is blocked when the processor is operating in a debugging mode.
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申请公布号 |
US7055006(B1) |
申请公布日期 |
2006.05.30 |
申请号 |
US20030426755 |
申请日期 |
2003.04.30 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
KELSEY JAMES D.;BARING-GOULD SENGAN |
分类号 |
G06F12/14 |
主分类号 |
G06F12/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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