发明名称 |
Semiconductor memory device and test method thereof |
摘要 |
A semiconductor memory device vice disclosed herein comprises: a memory cell array divided into a plurality of blocks, each of which includes a plurality of memory cells; a plurality of row decoders which correspond to the blocks, each of the row decoders including an access information holder configured to hold access information indicating whether its corresponding row decoder has been accessed; and an access information reader configured to read the access information held in the access information holders.
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申请公布号 |
US7054209(B2) |
申请公布日期 |
2006.05.30 |
申请号 |
US20050134576 |
申请日期 |
2005.05.19 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KAWAI KOICHI;IMAMIYA KENICHI |
分类号 |
G01R31/28;G11C7/00;G11C16/02;G11C16/04;G11C16/06;G11C16/08;G11C29/00;G11C29/02;G11C29/12;G11C29/26 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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