发明名称 Method for making a three-dimensional integrated circuit structure
摘要 Vertically oriented semiconductor devices may be added to a separately fabricated substrate that includes electrical devices and/or interconnect. The plurality of vertically oriented semiconductor devices are physically separated from each other, and are not disposed within the same semiconductor body, or semiconductor substrate. The plurality of vertically oriented semiconductor devices may be added to the separately fabricated substrate as a thin layer including several doped semiconductor regions which, subsequent to attachment, are etched to produce individual doped stack structures. Alternatively, the plurality of vertically oriented semiconductor devices may be fabricated prior to attachment to the separately fabricated substrate. The doped stack structures may form the basis for diodes, capacitors, n-MOSFETs, p-MOSFETs, bipolar transistors, and floating gate transistors. Ferroelectric memory devices, Ferromagnetic memory devices, chalcogenide phase change devices, may be formed in a stackable add-on layer for use in conjunction with a separately fabricated substrate. Stackable add-on layers may include interconnect lines.
申请公布号 US7052941(B2) 申请公布日期 2006.05.30
申请号 US20040873969 申请日期 2004.06.21
申请人 LEE SANG-YUN 发明人 LEE SANG-YUN
分类号 H01L21/84;H01L;H01L21/30;H01L21/301;H01L21/46;H01L27/06;H01L31/072 主分类号 H01L21/84
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