SYSTEMS AND METHODS FOR MONITORING AND CONTROLLING BINARY STATE DEVICES USING A MEMORY DEVICE

摘要

A static random access memory (SRAM) (350) includes an input read register (IRR) (330) for monitoring the state of external binary devices (370). The SRAM (250) can be a multi port (121-123) device for access by multiple processors (111-113) or controllers. Each bit (3300-1) of the IRR can mirror the state of a connected external binary device (441-442), and can be read to a connected processor (111-112) using a standard read instruction. Each bit (3600-4) of the ODR (360) can manipulate the state of a connected external binary device (571-575) by providing the device with a path to the SRAM (350) supply voltage (581-582). Each bit (3600-4) of the ODR (360) can also be read without changing the state, or interrupting the operation of, the connected external binary device (571-575).