| 摘要 |
<p>The present memory structure includes thereof a first conductor (BL), a second conductor (WL), a resistive memory cell (130) connected to the second conductor (WL), a first diode (134) connected to the resistive memory cell (130) and the first conductor (BL), and oriented in the forward direction from the resistive memory cell (130) to the first conductor (BL), and a second diode (132) connected to the resistive memory cell (130) and the first conductor (BL), in parallel with the first diode (134), and oriented in the reverse direction from the resistive memory cell (130) to the first conductor (BL). The first and second diodes (134, 132) have different threshold voltages.</p> |
| 申请人 |
SPANSION LLC;TRIPSAS, NICHOLAS, H.;BILL, COLIN, S.;VANBUSKIRK, MICHAEL, A.;BUYNOSKI, MATTHEW;FANG, TZU-NING;CAI, WEI, DAISY;PANGRLE, SUZETTE, K.;AVANZINO, STEVEN |
发明人 |
TRIPSAS, NICHOLAS, H.;BILL, COLIN, S.;VANBUSKIRK, MICHAEL, A.;BUYNOSKI, MATTHEW;FANG, TZU-NING;CAI, WEI, DAISY;PANGRLE, SUZETTE, K.;AVANZINO, STEVEN |
