| 摘要 |
PROBLEM TO BE SOLVED: To provide a logical verification method and a verification system of an integrated circuit by which generation of input data for causing an event intended by a verifier is facilitated, more efficient and higher quality logical verification is realized. SOLUTION: In order to verify data processing results in the integrated circuit 102, data for verification of the integrated circuit 102 are prepared first. Then, the input data to be inputted in the integrated circuit 102 are generated by an input data generation part 101, inputted in the integrated circuit 102 by every predetermined unit via an input data transmitting part 103 and processed. A data processing result measurement part 105 measures output data outputted from the integrated circuit 102 to calculate difference between the output data and data for verification. Then, the input data generation part 101 generates a new piece of input data to be inputted in the integrated circuit 102 next based on the difference. COPYRIGHT: (C)2006,JPO&NCIPI
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