| 摘要 |
PROBLEM TO BE SOLVED: To test operation corresponding to a fast clock only by input of a slow clock. SOLUTION: A semiconductor device of the present invention is a semiconductor device equipped with a clock output portion and a delay circuit, wherein the clock output portion is set to a 1st state according to input of a 1st clock, a 2nd state according to input of a delayed clock from the delay circuit, and to a 3rd state according to input of a 2nd clock, and the delay circuit delays the 1st clock and outputs the delayed clock. In such constitution, precharging and read/write access can be tested at an operating speed corresponding to the fast clock. COPYRIGHT: (C)2006,JPO&NCIPI
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