发明名称 DESIGN METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a design method of a semiconductor integrated circuit which uses JI or SI, capable of analyzing in advance the effect of a parasitic bipolar transistors and that of guard ring against surge using simulation, for a lower product cost. SOLUTION: The design method includes a first step S1 in which a plurality of semiconductor elements constituting an integrated circuit at a surface layer part of a semiconductor substrate are laid out on CAD, a second step S2 for extracting a parasitic bipolar transistor other than semiconductor elements from the layout diagram on CAD, a third step S3 for extracting a circuit parameter of the parasitic bipolar transistor by device simulator (TCAD), and fourth step S4 in which the parasitic bipolar transistor is integrated in the integrated circuit for analyzing circuit operation by a circuit simulator (SPICE). COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006134955(A) 申请公布日期 2006.05.25
申请号 JP20040319664 申请日期 2004.11.02
申请人 DENSO CORP 发明人 KONO KENJI
分类号 H01L21/82;H01L21/822;H01L21/8222;H01L21/8248;H01L21/8249;H01L27/04;H01L27/06;H01L27/082;H01L29/00;H01L29/06 主分类号 H01L21/82
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