发明名称 PACKET TRANSMITTER
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a packet transmitter which improves the memory access efficiency at header data read in a destination address analyzing process to improve a process performance of the packet transmission. <P>SOLUTION: Packet input processors 20-1 to 20-n generate pointers and discriminate the packet type of received packets to generate discrimination data including the pointers and the packet type discriminating result. A memory access controller 33 recognizes the header readout quantity of packets on the basis of the packet type discriminating result to generate first readout data including the header readout quantity and a readout pointer for showing the packets storing area of a packet memory 11, thereby adaptively reading header data of packets out of the first opening 11 according to the first readout data. A protocol processor 40 does a destination address analyzing process from the read header data. A packet updater 50 updates old destination addresses of packets to new destination addresses to generate and output destination address-updated packets. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006135574(A) 申请公布日期 2006.05.25
申请号 JP20040321482 申请日期 2004.11.05
申请人 FUJITSU LTD 发明人 FUKUNAGA HIDEYO;IMAMURA KATSUMI;KUROKAWA YASUSHI;KUDO HIDEYUKI;WATANABE YOKO
分类号 H04L12/46;H04L29/06 主分类号 H04L12/46
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