发明名称 Mechanism for reducing power consumption of a transmitter/receiver circuit
摘要 A mechanism that reduces power consumption of a transmitter/receiver circuit in a wireless device. The transmitter/receiver circuit is powered down to a reduced-power state after transmitting a message. The reduced-power state is too low to be able to transmit or receive information. Round trip statistics regarding how low it typically takes to receive a response to the message are then used to determine when to power up the transmitter/receiver circuit to the extent that it could receive the response. Accordingly, by being powered up for only a window of time in which the receipt of the response would likely occur, the transmitter/receiver circuit consumes less power while still likely receiving the response. The window of time may be adjusted as appropriate for the importance of the information, the performance of the specific wireless network, and the sensitivity of the wireless network to not receiving the response.
申请公布号 US7051220(B2) 申请公布日期 2006.05.23
申请号 US20030376413 申请日期 2003.02.28
申请人 MICROSOFT CORPORATION 发明人 GEIGER AVI R.;DAVIS GLENN M.;KRANTZ ANTON W.
分类号 G06F1/32;G06F1/26 主分类号 G06F1/32
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