发明名称 Digital/analog common tuner
摘要 Circuits and buses directed to analog signal processing are accommodated in a cabinet functioning as an electromagnetic shielding. Circuits and buses directed to digital signal processing are disposed outside the cabinet. In order to minimize generation of noise from the bus through which digital data is transmitted, a microprocessor combines a plurality of signals and data as digital data for output onto a bus from one I/O port. A decoder that receives and separates the combined data is provided in the cabinet. Data is transferred between the microprocessor and the decoder through one bus. As a result, a digital/analog common tuner has the influence of noise generated from a digital signal processing system on the analog signal processing system suppressed, improving the reception properties.
申请公布号 US7050119(B2) 申请公布日期 2006.05.23
申请号 US20030336019 申请日期 2003.01.03
申请人 SHARP KABUSHIKI KAISHA 发明人 MASUDA SHIGETO
分类号 H04N5/50;H03G3/00;H03G3/30;H03J1/00;H04B1/10;H04N5/44;H04N5/46;H04N5/52 主分类号 H04N5/50
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