发明名称 Method and related apparatus for chip testing
摘要 A chip capable of performing self testing includes: an output circuit for generating output signals; a transmitting circuit coupled to the output circuit for transmitting output signals generated by the output circuit; a receiving circuit for receiving signals transmitted to the chip and generating corresponding receiving signals; a first multiplexer; and an input circuit coupled to an output port of the first multiplexer for receiving outputs of the first multiplexer, wherein the first multiplexer includes: a first input port coupled to the output circuit for receiving output signals generated by the output circuit; and a second input port coupled to the receiving circuit for receiving signals generated by the receiving circuit.
申请公布号 US7049839(B1) 申请公布日期 2006.05.23
申请号 US20050160591 申请日期 2005.06.30
申请人 VIA TECHNOLOGIES INC. 发明人 HSIAO CHIN-FA;CHIANG CHIN-YI
分类号 G01R31/02 主分类号 G01R31/02
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