发明名称 |
DECODING APPARATUS AND DECODING METHOD |
摘要 |
<p>To provide a decoder and decoding method capable of reducing the number of times received data is decoded. A decoder according to the present invention includes: a Viterbi decoder decoding received data; a decode data length storage area storing a decode data length; a decoded data temporary storage area storing temporary storage data as decoded data up to a decode data length; a maximum data storage memory storing maximum decoded data as decoded data up to a maximum data length; a maximum-likelihood detection circuit selecting a decode data length based on likelihood information; and a decoded data reconstruction circuit replacing a part of maximum decoded data with temporary decoded data.</p> |
申请公布号 |
KR20060051867(A) |
申请公布日期 |
2006.05.19 |
申请号 |
KR20050091483 |
申请日期 |
2005.09.29 |
申请人 |
NEC ELECTRONICS CORPORATION |
发明人 |
HASHIMOTO TAKESHI |
分类号 |
H03M13/39;H03M13/41;H04B7/26;H04J13/00;H04L1/00 |
主分类号 |
H03M13/39 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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