摘要 |
PROBLEM TO BE SOLVED: To form an interlayer dielectric of multilayer wiring structure without a problem of depositing contamination, and with high flatness without spoiling electrical property. SOLUTION: The method comprises a CVD process (step 1-5) of forming dopant content silicon oxide film in semi-ordinary pressure region by CVD method, and a reflowing process of reflowing the formed dopant content silicon oxide film. The CVD process is constituted by a first CVD process (step 2-4) of depositing the silicon oxide film containing dopant in high density using organic silicon system gas, dopant content organic system gas, and oxidizing gas as material gases; and a second CVD process (step 5) of depositing the silicon oxide film containing a small amount of dopant by controlling the dopant content organic system gas to be less in amount than that of the first CVD process. Problems of moisture absorption and depositing contamination caused by high density dopant, can be avoided by improving reflow ability in such a way that the dopant density is controlled in the first and second CVD processes. COPYRIGHT: (C)2006,JPO&NCIPI
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