发明名称 BIPOLAR TRANSISTOR AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To reduce a parasitic capacitance in a bipolar transistor without involving the increase of a base resistance, thereby improving a characteristic of high frequency. SOLUTION: An SiO<SB>2</SB>mask 3 having a strip-shaped opening is formed on an n-type GaN layer 2, an n-type AlGaN emitter layer 4 is selectively formed on the n-type GaN layer 2, a p-type GaN base layer 5 is formed on the n-type AlGaN emitter layer 4, and simultaneously, the p-type GaN base layer 5 is formed on the SiO<SB>2</SB>mask 3 due to a transverse growth too. Due to such a structure, a base-collector junction capacitance C<SB>BC</SB>and a base-emitter junction capacitance C<SB>BE</SB>are significantly reduced, and the high frequency characteristics of the bipolar transistor can be improved. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006128554(A) 申请公布日期 2006.05.18
申请号 JP20040317883 申请日期 2004.11.01
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAKAZAWA TOSHIYUKI;UEDA TETSUZO
分类号 H01L21/331;H01L21/28;H01L29/417;H01L29/737 主分类号 H01L21/331
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