发明名称 |
Power reduction in module-based scan testing |
摘要 |
A circuit and method for reducing the power consumed by module-based scan testing. In one embodiment constant data is provided to inputs, such as 33 , of scan chains not used in testing, such as 32 . Another embodiment is a method whereby transitions in a subset of scan chains, such as 32 , are minimized through the use of constant input data.
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申请公布号 |
US2006107144(A1) |
申请公布日期 |
2006.05.18 |
申请号 |
US20050305581 |
申请日期 |
2005.12.16 |
申请人 |
SAXENA JAYASHREE;BUTLER KENNETH M;JAIN ATUL K;FRYARS ANTHONY;HETHERINGTON GRAHAM G |
发明人 |
SAXENA JAYASHREE;BUTLER KENNETH M.;JAIN ATUL K.;FRYARS ANTHONY;HETHERINGTON GRAHAM G. |
分类号 |
G01R31/28;G01R31/317;G01R31/3185;H01L21/822;H01L27/04 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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