发明名称 SEMICONDUCTOR MEMORY DEVICE WITH MOS TRANSISTORS, EACH HAVING A FLOATING GATE AND A CONTROL GATE, AND MEMORY CARD INCLUDING THE SAME
摘要 <p>A semiconductor memory device comprises memory cells, and bit lines. The each of the memory cells has a first MOS transistor and a second MOS transistor. The first MOS transistor includes a floating gate and a control gate. The second MOS transistor has a drain connected to the source of a first MOS transistor. The bit lines connect electrically to drains of the first MOS transistors. In a write operation, a write inhibit voltage settable to a negative voltage is applied to the bit lines unconnected to a selected memory cell in a write operation.</p>
申请公布号 KR20060047328(A) 申请公布日期 2006.05.18
申请号 KR20050033081 申请日期 2005.04.21
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 UMEZAWA AKIRA
分类号 G11C16/02;H01L27/115;G11C11/34;G11C16/04;G11C16/06;G11C16/12;H01L21/8247;H01L29/788;H01L29/792 主分类号 G11C16/02
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