摘要 |
<P>PROBLEM TO BE SOLVED: To perform arithmetic operation of a large amount of data at high speed regardless of the contents of operation or data bit width. <P>SOLUTION: A memory cell mat (30) is divided into a plurality of entries, an arithmetic logic unit (ALU) is arranged corresponding to each entry (ERY) and between the entries and the corresponding arithmetic logic units, arithmetic/logic operation is executed in bit-serial and entry-parallel mode. Where parallel operation is not very effective, data is transferred in entry-serial and bit-parallel mode to a group (82) of processors provided at a lower portion of the memory cell mat (30) and the arithmetic operation is executed. <P>COPYRIGHT: (C)2006,JPO&NCIPI |