发明名称 SEMICONDUCTOR DEVICE, SEMICONDUCTOR SIGNAL PROCESSING APPARATUS AND CROSSBAR SWITCH
摘要 <P>PROBLEM TO BE SOLVED: To perform arithmetic operation of a large amount of data at high speed regardless of the contents of operation or data bit width. <P>SOLUTION: A memory cell mat (30) is divided into a plurality of entries, an arithmetic logic unit (ALU) is arranged corresponding to each entry (ERY) and between the entries and the corresponding arithmetic logic units, arithmetic/logic operation is executed in bit-serial and entry-parallel mode. Where parallel operation is not very effective, data is transferred in entry-serial and bit-parallel mode to a group (82) of processors provided at a lower portion of the memory cell mat (30) and the arithmetic operation is executed. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006127460(A) 申请公布日期 2006.05.18
申请号 JP20050143109 申请日期 2005.05.16
申请人 RENESAS TECHNOLOGY CORP 发明人 NODA HIDEYUKI;SAITO KAZUNORI;ARIMOTO KAZUTAMI;DOSAKA KATSUMI
分类号 G06F15/80;G06F15/16;G06F17/16;G11C7/10 主分类号 G06F15/80
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