| 摘要 |
<p>Method of manufacturing and a transistor structure thereof comprising: a pair of spaced apart regions forming a source region and a drain region and defining at least part of a channel region therebetween, the source region and the drain region comprising a semiconductor heavily doped with n-type impurity element and said channel region comprising a semiconductor lightly doped with n-type impurity element; and a pair of gates each being insulated from the channel region by a respective gate insulating layer and being disposed substantially symmetrically along the channel region on opposite sides of thereof; whereby in use independent voltages may be applied to said gates so as to modify conductivity of the channel.</p> |
