发明名称 Dual-edge triggered multiplexer flip-flop and method
摘要 A dual edge multiplexing flip-flop comprises a first circuit block having a first data input, a first clock signal input, a supply voltage input, and a ground connection; a second circuit block having a second data input, a second clock signal input, a supply voltage input, and a ground connection. Each circuit block is coupled to a common output node. When a common clock signal is input into the clock signal inputs, each circuit block outputs a floating voltage during one half of each clock cycle and a voltage indicative of a corresponding data input signal during the other half of each clock cycle.
申请公布号 US2006104124(A1) 申请公布日期 2006.05.18
申请号 US20040990119 申请日期 2004.11.16
申请人 PADAPARAMBIL MURALIKUMAR A 发明人 PADAPARAMBIL MURALIKUMAR A.
分类号 G11C7/10 主分类号 G11C7/10
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