发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To achieve a bit line twisted structure without increase of a cell array. SOLUTION: The semiconductor memory is equipped with a first and a second bit line, BL0 and bBL0, a first cell block BK arranged in a first column 01, a first block select transistor BST connected between a first bit line BL and the first cell block BK, a second cell block BK arranged in a second column 02, and a second block select transistor BST connected between a second bit line bBL and the second cell block BK. The first and second bit lines, BL and bBL, have the bit line twisted structure, and the first and second bit lines, BL and bBL, are replaced with each other in a block selector region BS. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006128471(A) 申请公布日期 2006.05.18
申请号 JP20040316283 申请日期 2004.10.29
申请人 TOSHIBA CORP 发明人 MIYAGAWA TADASHI;TAKASHIMA DAIZABURO
分类号 H01L27/105;H01L21/8246 主分类号 H01L27/105
代理机构 代理人
主权项
地址