发明名称 MEMORY SYSTEM CONTROLLING INTERFACE TIMING IN MEMORY MODULE AND TIMING CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To provide a system and a method for controlling interface timing in a memory module. SOLUTION: A memory system is characterized that it comprises a memory module comprising a plurality of memory devices which store data, and a memory module controller which controls the interface timing associated with a plurality of memory devices in accordance with memory information and memory signal information, an interface controller connecting the memory module connected to at least one input/output device, which receives the memory information from the memory module, and a memory controller which receives the memory information from the interface controller and provides the memory module with the memory information and the memory signal information, the memory information comprises memory initialization information and interface timing information for the plurality of memory devices. Thus, the interface timing of the memory devices can be adjusted by storing timing adjustment information in a memory information storage part. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006127515(A) 申请公布日期 2006.05.18
申请号 JP20050310377 申请日期 2005.10.25
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 CHOI HEE-JOO;LEE JOO-HEE;KIN TOSHUN
分类号 G06F12/00;G06F12/06 主分类号 G06F12/00
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