发明名称 INTEGRATED CIRCUIT WITH ADAPTIVE SPEED BINNING
摘要 Systems and techniques are disclosed relating to adapting the frequency of an electronic device comprising an integrated circuit and an electronic component to improve performance. The integrated circuit determines a set of frequency plans, each corresponding to a distribution of delay range highest passing values and one of a set of frequencies at which the electronic device can operate. Based on communication with the electronic component, the integrated circuit implements a preferred frequency plan.
申请公布号 WO2006052720(A1) 申请公布日期 2006.05.18
申请号 WO2005US39952 申请日期 2005.11.04
申请人 QUALCOMM INCORPORATED;PATEL, JAGRUT, V.;PRABHAKARAN, RAJEEV;KAPOOR, SANAT;BULLARD, GREGORY 发明人 PATEL, JAGRUT, V.;PRABHAKARAN, RAJEEV;KAPOOR, SANAT;BULLARD, GREGORY
分类号 G06F1/08 主分类号 G06F1/08
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