发明名称 |
A leakage-tolerant wide-NOR dynamic logic circuit with a strong keeper |
摘要 |
The strong keeper 401 in a wide-NOR dynamic logic circuit is disabled briefly by a gating device 404 during the evaluation phase. The pull-down transistors 105 can thus pull down the dynamic node 104 without contention with the powerful keeper 401 which would otherwise overwhelm them. A strong keeper is required to maintain the precharged node potential because a large leakage current can flow in the large number of short-channel pull-down transistors 105. The circuit may be used in a memory array or in a wide domino-NOR gate. The keeper may comprise an inverter or a sense amplifier coupled to a feedback PMOS transistor. |
申请公布号 |
GB2420237(A) |
申请公布日期 |
2006.05.17 |
申请号 |
GB20050022582 |
申请日期 |
2005.11.04 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
XEUJUN YUAN;YE XIONG;PETER F LAI |
分类号 |
H03K19/096;G11C7/06;G11C7/12 |
主分类号 |
H03K19/096 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|