发明名称 Apparatus and method for on-chip ADC calibration
摘要 An ADC circuit includes a multiplexer, a calibration circuit, one or more ADC banks, and a calibration ladder, all on an integrated circuit. The calibration resistor ladder is enabled during a calibration phase, and disabled during normal operation. When enabled, the calibration resistor ladder provides a calibration reference signal. Also, the multiplexer provides the calibration reference signal to one or more ADC banks during a calibration phase, and provides an analog input signal to the ADC banks otherwise. The calibration circuit is arranged to provide one or more adjustment signals to the ADC banks to calibrate the ADC banks in response to one or more comparator output signals from the ADC banks.
申请公布号 US7046179(B1) 申请公布日期 2006.05.16
申请号 US20040817322 申请日期 2004.03.30
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 TAFT ROBERT C.;MENKUS CHRISTOPHER A.;TURSI MARIA R.;HIDRI OLS;TUECHLER ANDREAS;PONS VALERIE
分类号 H03M1/10 主分类号 H03M1/10
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