| 摘要 |
A GPS RF Front End IC using a single conversion stage, which is immune from self jamming from clock signal harmonics generated internally or from dominant clock signal harmonics generated externally by the subsequent baseband GPS processor which uses a clock of 48.fo for GPS processing. The improved frequency plan reduces the problems of interference when the integration of the RF and Baseband functions is required in the form of a single-chip, or as 2 individual chips on a common substrate.
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