发明名称 Method for scalable architectures in stackable three-dimensional integrated circuits and electronics
摘要 The design methods described enable three-dimensional integrated circuit systems in which all of the dies, in a vertically bonded stack of dies, are identical. Only one mask set and wafer type is required since a single circuit design is produced for one die in the stack and reused for all the dies with little or no modification. The system scales directly as the level of stacking is increased while incurring no extra design effort, beyond that required for the initial design.
申请公布号 US7046522(B2) 申请公布日期 2006.05.16
申请号 US20030391781 申请日期 2003.03.20
申请人 发明人 SUNG RAYMOND JIT-HUNG;BRANDON TYLER LEE;KOOB JOHN CONRAD;ELLIOTT DUNCAN GEORGE;LEDER DANIEL ARIE
分类号 H05K1/11;H01L23/52;H01L23/535;H01L25/065;H05K3/46 主分类号 H05K1/11
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