发明名称 Method for fabricating a test interconnect for bumped semiconductor components by forming recesses and cantilevered leads on a substrate
摘要 A method for fabricating an interconnect for semiconductor components includes the steps of: providing a substrate; forming a metal layer on the substrate; etching projections in the metal layer; etching the metal layer to form patterns of leads; etching recesses in the substrate to cantilever the leads and form contacts for electrically engaging bumped contacts on a component; and then forming conductors to the leads. With the substrate comprising silicon, insulating layers can also be formed on the substrate, and within the recesses, for electrically insulating the leads and the conductors. With the conductors formed on a same surface of the substrate as the contacts, the same etching process can be used to form the conductors and the leads.
申请公布号 US7043831(B1) 申请公布日期 2006.05.16
申请号 US20010844532 申请日期 2001.04.30
申请人 发明人
分类号 H01K3/10;G01R1/04;H05K1/11;H05K3/32;H05K3/40 主分类号 H01K3/10
代理机构 代理人
主权项
地址